| S.No. |
Project Title |
Language |
Abstracrs |
| 1 |
Design of 16-bit risc |
VERILOG |
Download |
| 2 |
implementation of kogge-stone adder |
Verilog HDL |
Download |
| 3 |
Implementation of (9,7) using DWT Lifting Scheme |
Verilog HDL |
Download |
| 4 |
implementation of 16 bit spanning tree carry look ahead adder |
Verilog HDL |
Download |
| 5 |
Design of 16 point Radix-4 FFT(fast fourier transform) Algorithm |
Verilog HDL |
Download |
| 6 |
Design of ATM (Automated teller machine ) |
Verilog HDL |
Download |
| 7 |
VMFU |
Verilog HDL |
Download |
| 8 |
Design of lossless 2-D dwt (discrete wavelet transform ) using lifting scheme architecture |
Verilog HDL |
Download |
| 9 |
HAMMING CODE |
Verilog HDL |
Download |
| 10 |
Implementation of convolution |
Verilog HDL |
Download |
| 11 |
A spst for multimedia DSP applications |
Verilog HDL |
Download |
| 12 |
Carry select adder |
Verilog HDL |
Download |
| 13 |
Design of Dual Elevator Controller |
Verilog HDL |
Download |
| 14 |
implementation of self immunity for soft errors |
Verilog HDL |
Download |
| 15 |
Implementation of Radix-2 Parallel Multiplier |
Verilog HDL |
Download |
| 16 |
DDR3 SDRAM |
Verilog HDL |
Download |
| 17 |
CARRY SKIP ADDER |
Verilog HDL |
Download |
| 18 |
Multilayerd AHB BUS MATRIX For SOC |
Verilog HDL |
Download |
| 19 |
reversable water marking |
Verilog HDL |
Download |
| 20 |
Low Power ALU Design by Ancient Mathematics |
VHDL |
Download |
| 21 |
Design of Systollic Array Architecture for DWT |
Verilog HDL |
Download |
| 22 |
Design and Implementation of 16-QPSK |
Verilog HDL |
Download |
| 23 |
Design and Implementation of 16-bit QAM |
Verilog HDL |
Download |
| 24 |
Dct |
Verilog HDL |
Download |
| 25 |
RFID |
Verilog HDL |
Download |
| 26 |
Implementation of JPEG Image Compression |
Verilog HDL |
Download |
| 27 |
Atm |
Verilog HDL |
Download |
| 28 |
RS232 |
Verilog HDL |
Download |
| 29 |
RIPPLE CARRY ADDER |
Verilog HDL |
Download |
| 30 |
DUALPORT SRAM |
Verilog HDL |
Download |
| 31 |
Multiplication Accelaration Through Twin Precision |
VHDL |
Download |
| 32 |
OFDM TRANSMITTER |
VHDL |
Download |
| 33 |
VENDING MACHINE |
VHDL |
Download |
| 34 |
UART |
VHDL |
Download |
| 35 |
COMPLEXNUM MUL |
VHDL |
Download |
| 36 |
MICROCONTROLER |
VHDL |
Download |
| 37 |
OCP |
Verilog HDL |
Download |
| 38 |
FLOATINGPOINT MUL |
VHDL |
Download |
| 39 |
OFFCHIP AND SOC BUSBRIDGE |
VHDL |
Download |
| 40 |
TRAFFIC CONTROLLER |
VHDL |
Download |
| 41 |
GUESSING GAME |
VHDL |
Download |
| 42 |
FFT |
VHDL |
Download |
| 43 |
IFFT |
VHDL |
Download |
| 44 |
Radix2 butterfly processor to prevent overflow in arthametic |
VHDL |
Download |
| 45 |
BAUGH-WOOLY MUL |
VHDL |
Download |
| 46 |
ASYNCHRONOUS POINTER COMPARISON BASED FIFO |
HDL |
Download |
| 47 |
SPI SLAVE |
HDL |
Download |
| 48 |
Design of ddrsdram controller |
VHDL |
Download |
| 49 |
Amba-ahb protocol |
VHDL |
Download |
| 50 |
Design of 32-bit risc |
VHDL |
Download |
